1. Technical Field
The present invention relates to a method of fabricating a semiconductor device, and more particularly, to a method of forming a metal layer in the fabrication of a semiconductor device.
2. Discussion of Related Art
With improvements in semiconductor manufacturing, design rules for such devices are continually being scaled down. Accordingly, the elements forming such devices—including transistor channel length, interconnection width and distance, and contact pad size—are getting smaller and smaller.
But size reduction of these parts brings forth new problems. Contact pads, for instance, need to provide a low resistance contact but resistance increases and the part size is reduced. To address this difficulty, scaled down pads have been formed using a metal silicide layer. Such a metal silicide layer functions as an ohmic layer providing a low resistance interface between a silicon substrate and a metal layer formed thereon. Further, the metal silicide layer functions as a diffusion barrier layer for preventing two discrete materials from being diffused into the other one—that is, between a metal layer and an underneath semiconductor region, or between two metal layers in a multiple metal system.
The metal silicide layer is typically composed of titanium silicide (TiSi2) or a VIII group silicide, for example, PtSi2, PdSi2, CoSi2, NiSi2, and the like, with titanium silicide or cobalt silicide typically being used in a semiconductor device below 0.25 μm.
In a conventional fabrication method, and after a refractory metal layer has been deposited by a sputtering method, an annealing process such as rapid thermal process (RTP) is performed so as to form a metal silicide layer at the interface between the refractory metal layer and an exposed silicon region. Sputtering, however, has a drawback in that it results in poor step coverage by the metal layer within a contact hole having a high depth-to-opening aspect ratio. That is, the deeper the hole and the narrower the opening, the worse the coverage by sputtering upto a predetermined height from the bottom of the contact hole. Furthermore, an insufficient metal silicide layer is formed on the bottom of the contact hole without a subsequent annealing process.
In order to solve the problem of the poor step coverage in the sputtering method, a chemical vapor deposition (CVD) or plasma-enhanced chemical vapor deposition (PECVD) is used to deposit a refractory metal layer and form a metal silicide layer concurrently with the deposition of the refractory metal layer. Formation of the metal silicide layer inside a high and narrow contact hole is improved even without a subsequent annealing process because the refractory metal layer directly reacts with the silicon of an active region. The result of the CVD or PECVD methods are excellent step coverage, which simplifies the fabrication processes. Such a method of forming a metal layer using the CVD or the PECVD method as above is disclosed in U.S. Pat. No. 6,589,873.
FIG. 1 is a sectional view of a semiconductor device illustrating a conventional method of forming a metal layer.
Referring to FIG. 1, the conventional method of forming a metal layer includes supplying a metal chloride compound (TiCl4) into a PECVD chamber concurrently with a hydrogen gas and an argon gas before applying a RF power, thereby forming a metal layer inside a contact hole 311.
Here, the contact hole 311 selectively exposes the surface of polysilicon or silicon substrate doped with conductive impurities used as a conductive layer electrically connected to the metal layer from an interlayer insulating layer 309. For example, a metal oxide semiconductor field effect transistor (MOSFET) is formed below the contact hole 311, and the conductive layer exposed by the contact hole becomes a polysilicon gate electrode or source/drain regions of a silicon substrate.
At this time, if a high RF power is used in forming the metal layer, the gate electrode connected to the metal layer or the interlayer insulating layer is charged by the RF power, so that a gate insulating layer formed below the gate electrode may be damaged. This damage may be prevented by forming the metal layer without applying RF power at the initial time of forming the metal layer.
However, the conventional method of forming a metal layer without RF power has problems as follows.
First, a high temperature (about 1000° C.) is required in a CVD process to promote a chemical reaction between hydrogen and metal chloride compound. Application of high temperature, however, may damage the semiconductor device and reduce the production yield for such devices during mass manufacturing.
Secondly, premature bonding of the hydrogen and silicon to the surface of the polysilicon or silicon substrate may occur in the PECVD process to portions exposed by the contact hole 311. The bonded hydrogen and silicon acts as defects in forming metal silicide which results in an increase in the contact resistances of the conductive layer and the metal layer so that electrical characteristics of a semiconductor device may be deteriorated.
Accordingly, the need exists for a method of forming a contact within a contact hole that overcomes the drawbacks of the prior art.